CS4362-KQZ【PDF 19/42 页】IC DAC 6CH 114DB 192KHZ 48LQFP

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DS257F2

CS4362

Quiescent Voltage (Output) - Filter connection for internal quiescent voltage. VQ must be

capacitively coupled to analog ground, as shown in the Typical Connection Diagram. The nom-

inal voltage level is specified in the Analog Characteristics and Specifications section. VQ pre-

sents an appreciable source impedance and any current drawn from this pin will alter device

performance. However, VQ can be used to bias the analog circuitry assuming there is no AC

signal component and the DC current is less then the maximum specified in the Analog Charac-

teristics and Specifications section.

FILT+

Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-

cuits. Requires the capacitive decoupling to analog ground as shown in the Typical Connection

Diagram.

AOUTA1 +,-

AOUTB1 +,-

AOUTA2 +,-

AOUTB2 +,-

AOUTA3 +,-

AOUTB3 +,-

39,40

38,37

35,36

34,33

29,30

28,27

Differential Analog Output (Output) - The full-scale differential analog output level is specified

in the Analog Characteristics specification table.

MUTEC1

MUTEC2

MUTEC3

MUTEC4

MUTEC5

MUTEC6

Mute Control (Output) - The Mute Control pins go high during power-up initialization, reset,

muting, power-down or if the master clock to left/right clock frequency ratio is incorrect. These

pins are intended to be used as a control for external mute circuits on the line outputs to prevent

the clicks and pops that can occur in any single supply system. Use of Mute Control is not man-

datory but recommended for designs requiring the absolute minimum in extraneous clicks and

pops.

Stand-Alone Definitions

Mode Selection (Input) - Determines the operational mode of the device as detailed in Tables 6

and 7.

Control Port Definitions

SCL/CCLK

Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external

pull-up resistor to the logic interface voltage in IC Mode as shown in the Typical Connection

Diagram.

SDA/CDIN

Serial Control Port Data (Input/Output) - SDA is a data I/O line in IC Mode and is open drain,

requiring an external pull-up resistor to the logic interface voltage, as shown in the Typical Con-

nection Diagram; CDIN is the input data line for the control port interface in SPI Mode.

AD0/CS

Address Bit 0 (IC) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in IC

Mode; CS is the chip select signal for SPI Mode.

DSD Definitions

DSDA1

DSDB1

DSDA2

DSDB2

DSDA3

DSDB3

Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data.

DSD_SCLK

DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital serial audio interface.

DSD_EN

DSD Enable (Input) - When held at logic ‘1’ the device will enter DSD Mode (Stand-Alone Mode

only).

Pin Name

Pin Description

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